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TM-75/76 External Signals
TM-75/76 High-Resolution CCD Camera
For External HD, VD sync mode or Reset-Restart mode selection, please refer to Section 3.1.1, “Mode
Selection,” on page 8. Mode switch F2 must be set to ON for R-R mode and keep it OFF for normal HD,
VD external sync mode.
FIGURE 5. HD and Reset-Restart (VD) Relationship
4.4 External Trigger (TRIG) and Internal Sampling Clock
To ensure stable operation without the influence of jitter, the TM-75/76 samples shutter trigger pulse
(TRIG) by internal sampling clock (LCLK) and detects the low to high level change of TRIG. The
sampling occurs only at HD leading edge timing to generate the internal TRIG as shown below.
Therefore, the external TRIG pulse must be wider than 1H (64 µsec) for pulse width and pulse position
shutter control. All trigger pulse modes must work with Reset-Restart VD, which is described in
Section 5, “Operation Mode,” The TRIG input is pin #9 of the12-pin connector and the input impedance
is 100Ω.
FIGURE 6. External Trigger Timing
Odd
Field
Even
Field
Even
Field
Field Mode
Video
Frame Mode
Video
Field Mode VD
(Min. 2 pulses)
Frame Mode VD
(Min. 4 pulses)
EXT. HD for PLL
Invalid image Invalid image
Invalid images
Good image
(one field only)
Good image
Good images
(one full frame)
(Relationship with HD and Reset-Restart VD affects Odd or Even field output)
Even
Field
Odd
Field
Odd
Field
Odd
Field
Even
Field
Odd
Field
Even
Field
Field Images
(alternate different fields)
EXT. HD
EXT. TRIG
PIXEL CLOCK
LCLCK
INTERNAL TRIG (NORMAL)
Sampling
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